Small-Footprint Reconfigurable Heterogeneous Cryptographic Accelerator for Fog Computing

The Advanced Encryption Standard (AES) and Ascon algorithms are highly secure and compact, suitable for fog computing in Internet of Things (IoT) systems. However, existing research lacks a flexible and power-efficient hardware architecture for these algorithms on IoT devices. Therefore, this paper proposes a reconfigurable heterogeneous cryptographic accelerator (RHCA) that achieves high-performance and power-efficient cryptographic operations with minimal space requirements. The RHCA features a 4×4 heterogeneous processing element array (HPEA) and a hybrid arithmetic logic unit (HALU), which enhances parallel processing performance and reduces hardware resource usage. The evaluation of the RHCA on the ZCU102 FPGA demonstrates its exceptional performance and flexibility, achieving an AES throughput of 5.818 Gbps and an Ascon throughput of 0.563 Gbps. These results surpass existing FPGA-based works by factors ranging from 6.81 to 54.89 and 1.23 to 5.31, respectively. Moreover, by applying the HPEA, the hardware resource of RHCA is reduced by 33.6%, 26.1%, and 31.6% in LUTs, F7 Muxes, and CLBs, respectively, compared to the homogeneous configuration, leading to improved area efficiency.