Harmonic Minimization in Switched-Capacitor Multilevel Inverter Using Improved Grey Wolf Optimization

This research proposes an innovative 13-level switched capacitor multilevel inverter (SC-MLI) with built-in output voltage boosting capability. To obtain a 13-level boosted voltage output, the proposed SC-MLI employs 12 switches and 2 diodes connected with a single DC power source. The switching sequences in the proposed MLI are generated such that the capacitors are self-balanced and optimum voltage levels are obtained at the output. The 13-level SC-MLI proposed in this paper uses a selective harmonic elimination pulse width modulation (SHE-PWM) technique, based improved grey wolf optimization (IGWO) to determine the switching angles for filtering out the lower order harmonics, such as 5th, 7th, etc from the output voltage. The switching angles for the proposed topology have been calculated using IGWO algorithm. The proposed SC-MLI has been simulated using MATLAB/Simulink and experimentally verified through a 400W prototype using NEXYS 4 DDR FPGA. The efficiency of the proposed SC-MLI is found to be 95% and total harmonics distortion (THD) is within the limits. Further, a comparison is also made between the proposed SC-MLI and the other published SC-MLIs, and it is found that the proposed one demonstrates superior performance in terms of gain, total standing voltage (TSV), and number of active and passive components.