Design and Analysis of a Wideband Digital Step Attenuator With High Tuning Accuracy

This paper presents an ultra-wideband digital step attenuator (DSA) based on the 0.15-$\mu \textbf{m}$ GaAs pHEMT process. A method is proposed to quantitatively determine the limits of the circuit performance before compensation, and the method can be used to guide the selection of transistors. By selecting suitable topologies with the right transistor according to the proposed restrictive condition, high attenuation accuracy from DC to 20 GHz is achieved. The DSA demonstrates a 15.0-dB amplitude tuning range with a 1-dB tuning step. The simulated insertion loss is 3.1-4.5 dB at DC-20 GHz and the RMS attenuation error and phase variation are <0.27 dB and <4.6°.