Synthesis of Concurrent Error-Detection Circuits Based on Boolean Signals Correction Using Modular Weight-Based Sum Codes

The article explores a new method of synthesis concurrent error-detection circuits of digital automation devices and computing. The authors proposed using the properties of modular weight-based sum codes when constructing a concurrent error-detection circuit based on Boolean signals correction. In contrast to previous research, it is assumed that all signals from the diagnostic object in the concurrent error-detection circuit are transformed. The proposed solution allows to choose how to construct the error-detection circuit due to the variety of signal conversion methods. This enables the choice from the entire set of code words established during the concurrent error-detection circuit design phase, including a weight-based sum code of some of its subsets. Furthermore, it becomes possible to use simplified weight-based sum code encoders structures. From a practical implementation perspective, the presented approach enables to synthesize totally self-checking devices with reduced indicators of structural redundancy and energy consumption.