Accelerating Sorting Performance on FPGA: Combining Quick Sort and Heap Sort through Hybrid Pipelining

Hybrid pipelined sorting is a technique that com-bines the benefits of pipelined sorting and hybrid sorting algorithms. Top-k sorting is an algorithm that sorts only the top-k elements of a collection instead of sorting the entire collection. Top-k sorting is a variation of sorting where only the k largest (or smallest) elements in a dataset need to be sorted, rather than the entire dataset. This algorithm is often used when the collection is too large to be sorted entirely or when we only need the top
$k$
elements for some operation. However, the current FPGA-based implementation solutions face issues with sorting in high-performance scenarios. These problems are further compounded by the top-k sorting architecture. To address these issues, we propose a solution that improves throughput and decreases latency during the process. This is achieved by integrating quicksort and heap-based sorting algorithms, which overcome the limitations of the bitonic sort algorithm. The proposed architecture combines the strengths of both quicksort and heap-based sorting algorithms to achieve high performance while minimizing hardware resource utilization. The proposed sorting algorithm is synthesized and simulated using Vivado design suit 2022.2 and implemented on a Kintex-7 FPGA board.