Lightweight Secured Split Test Technique with RMA Capability to Prevent IC Counterfeiting

Due to globalization, various activities in design, manufacturing and testing of ICs is fragmented across geographies has led to several hardware security issues. IC counterfeiting is one of the important hardware security issue the chip makers should address to avoid loss of reputation and litigations. Most of the chipmakers depend upon the Outsourced Assembly and Test (OSAT) centres to test their integrated circuits (lCs). The untrusted OSAT centre or adversary in OSAT centre will sell the out of specification or failed chips in open market as good chips. To prevent such counterfeit ICs coming out from the untrusted OSAT centres, several techniques are presented in the past like secure split test (SST). The existing SST techniques use heavy weight or bulky encryption schemes like RSA. In this paper, we propose a novel light weight SST technique to mitigate counterfeit ICs coming out from untrusted OSAT centres during Return Material Authorization (RMA) test flow and scan encryption against reverse engineering attacks.