Output Power and Efficiency Improvement of a Class C Power Amplifier

This paper presents a highly efficient class C power amplifier (PA). The practical current-voltage waveforms at the drain/collector terminal of the package plane deviate significantly due to the parasitic effects of a discrete transistor at the RF frequencies. This work focuses on optimizing the current-voltage waveforms at the package plane to minimize the DC power consumption of the device. Additionally, a harmonic suppression network is introduced as a part of the output matching network. This arrangement substantially enhances both the power-added efficiency (PAE) and the output RF power. The harmonic rejection also experiences a significant improvement. The simulated predictions are validated through fabrication and measurement. The PAE improves by at least 10%, and the output power increases by at least 1.6 dBm compared to a class C PA.