Inductorless Analog Time-Delays for Nonlinear RF Signal Processing Circuits in 180nm CMOS

Extremely low latency and low power consumption is crucial for emerging spectrum sensing, electronic warfare, and wireless communications applications such as phased-array beamforming for wideband signals, convolutional neural networks (CNNs) at high RF bandwidths for AI/ML inference on RF waveforms, and tunable multi-band microwave filters. Analog computers implemented in high performance integrated circuit (IC) platforms based on CMOS radio-frequency (RF) IC technologies have significant potential for such edge computing applications. The fast and low-latency response of analog RFICs ensures that tight performance specifications in terms of both latency and power consumption can be met without compromising on computational throughput. The analog computing approach also allows sensors to directly communicate with edge processors and produce intelligent action outputs at low latency without the power overhead of digitization incurred by conventional edge computing systems. Many of the necessary analog computations require a true time delay (TDD) analog memory as a fundamental building block. This paper discusses recent work on realizing analog memory using TTD elements for radar, communications, and AI/ML applications. The circuits were designed in TSMC 180nm CMOS technology and simulated at the transistor level using Cadence Spectre.