Optimal Design of SAPFs for Harmonic Mitigation of Electric Arc Furnaces with Real-Time Digital Simulation Hardware

Electric arc furnaces (EAF) cause several power-quality problems such as harmonics, inter-harmonics, voltage/ current unbalance, and voltage flicker. Therefore, this manuscript offers an optimally designed shunt active power filter (SAPF) with a high-power level for EAF to mitigate current harmonics and suppress the voltage flicker. Generally, the optimal SAPF design may not be achieved with the traditional design techniques. Subsequently, the article describes SAPF design as an optimization problem with the harmonic pollution (HP) reduction as an objective function. Then, it uses a meta-heuristic optimization technique called the Chimpanzee Optimization Algorithm (ChOA) to solve this function. Six parameters of the SAPF variables are optimized: filter resistance, reactance, dc-link capacitance, its voltage value, and the controller gains (proportional and integral). Then, they are compared with the values obtained by using other evolutionary computational algorithms such as the genetic algorithm (GA) and particle swarm optimization (PSO). The proposed system was simulated using the Matlab/ Simulink/m-files/ and then tested in real time using a combination of RT-LAB software and OPAL-RT 4510 real-time simulator. The system had been tested with and without the optimized SAPF that was offered. The harmonic of the EAF-current was reduced to the acceptable limits of IEEE-519 using the proposed optimal design SAPF, as demonstrated by the results.