Design of power amplifier with bandpass filter

This article presents a 3.5 GHz power amplifier (PA) with 3^th-order bandpass loop filter development that uses two stage cascade architecture. The two stages partition power amplifier with Gm-C band-pass filter is promulgated by the tsmc-0.18 um CMOSprocessing with its the P_1dB of -22.95 dBm, and conversion gain of 22.57 dB, respectively. Come out chipset arranges 20.72 W with a sourcing voltage of 1.8 V.