A Low Power DCOC Circuit with 57.7 dB DC-offset Attenuation for CW Radar Sensor

This article presents the design of a novel DC-offset cancellation (DCOC) circuit aimed to use in a homodyne continuous wave (CW) radar sensor receiver to overcome the leakage problem and is implemented in 130 nm SiGe BiCMOS (Bipolar complementary metal–oxide–semiconductor). This is a resistor-less DCOC designed using a fully differential operational transconductance amplifier (OTA), feedback low-pass filter (LPF) realized using Miller’s multiplier-based capacitor with BJT for better DC-offset attenuation/cancellation and minimizing the layout area. The performance of this DCOC topology has been benchmarked through post-layout simulation results. This DCOC has demonstrated a DC-offset attenuation of 57.7 dB, DC-offset cancellation for the offset voltage varying from -0.3 V to 2 V, and noise figure (NF) from 20.3 dB to 26 dB in the pass-band frequency band of 3.98 KHz to 41 MHz. Compared to the available DCOC circuit in the literature, it has demonstrated the highest DC-offset attenuation and DC-offset cancellation by using the lowest power of 0.875 mW, and a layout area of 0.148 mm².