A Single Ring-Oscillator-Based Test Structure for Timing Characterization of Dynamic Circuit

Dynamic circuit is extensively used where high speed is required such as critical paths in digital and analog/mixed-signal circuits, yet it has not been successfully characterized and integrated into the digital design flows as its characterization is not straightforward due to its complex timing requirement. In this article, we first propose a step-by-step definition of dynamic circuit’s timing parameters required in its timing characterization. We then propose a single ring-oscillator-based test structure for the on-chip measurement of all these defined timing parameters. From the single output of a ring oscillator, this test structure can efficiently extract the timing parameters, including delay and setup/hold times under different conditions of input signal transition time as well as output load capacitance, which is sufficient for the construction of liberty files in the standard-cell library. With the proposed test structure, the setup/hold constraints are examined reiteratively by the ring under actual operating environment. Thus, the worst case result can be obtained and the error rate of the circuit can be estimated.