Effect of Underfill on Substrate Trace Crack under PTC

This paper investigates substrate trace crack in board level Power Thermal Cycling (PTC) test with underfill between package and PCB. Effect of underfill is evaluated by comparing substrate material stress and strain response. Simulation results shows that plastic strain of soldermask and copper trace can be greatly impacted by presence of underfill and its type, resulting possible interaction between package and PCB stress distribution, and leads to variation in board level reliability performance.