Life assessment of Micro-via used in thin Printed Circuit Board under Thermal Cycling loads & influence of selected design parameters

Automotive electronics industry has witnessed significantly vast growth in the last one decade. Miniaturization of electronic assemblies helped Engineers to design compact products. Such products demand highly dense Printed Circuit Board (PCB) which poses a huge reliability challenge, mainly under thermal cycling loads. These PCBs use closely spaced micro-vias, filled with dielectric material, with low via aspect ratios. These micro-vias are susceptible to crack under thermal cycling load due to thermal mismatch between outer copper cladding and inner dielectric material. Initially such cracks lead to local electrical discontinuity and with continued usage, resulting in overall malfunctioning of the product. Such malfunctions in automotive safety critical products would compromise the overall vehicle safety architecture. In countries where safety norms are driven by Government regulations, it is even more stringent to meet worst-case automotive environmental loads to stay in the market competition. Hence upfront reliability evaluation and risk mitigation of such micro-vias is extremely critical in the design cycle.This paper attempts to evaluate thermal fatigue life of closely spaced through hole (PTH) and blind micro-vias on relatively thin substrate using Finite Element Analysis (FEA) under automotive thermal cycling loads. Micro-vias thermal fatigue cycles are estimated using the method outlined in IPC technical report (IPC-TR-579). The unique highlight of this paper is investigating the effect of various geometric and material parameters of micro-vias on the via barrel stress and their subsequent impact on thermal fatigue life. Limited experimental correlations are performed for the dominant failure mode of micro-via using X-rays and cross-sectional images. Overall, simulation results help in upfront prediction of micro-via cracking and understanding subsequent electrical performance degradation, thereby avoiding validation test failures, warranty or field returns. Finally, the importance of controlling manufacturing process parameters to build RF board with SIW (micro-via) is briefly outlined.