Efficient Approximate Multipliers Design Utilizing Approximate Adders: A Comparative Evaluation

The demand for efficient and energy-conscious computing systems has driven the exploration of approximate computing as a viable solution. Approximate multipliers play a pivotal role in a wide range of applications, from signal processing to machine learning. This paper introduces a novel approach to designing approximate multipliers that leverages the benefits of approximate adders. By incorporating approximate adders into multiplier architectures, we aim to strike a balance between computational accuracy, speed, and power efficiency. In this paper, we propose an efficient approximate adder, and leveraging this novel approach, we design approximate multipliers that aim to strike a balance between computational accuracy, speed, and power efficiency. By incorporating these approximate adders into multiplier architectures, we address the growing demand for efficient and energy-conscious computing systems. This work conducts a comprehensive comparative evaluation of different approximate multiplier designs, shedding light on their respective strengths and weaknesses, while considering various 4, 8, and 16- bit multiplier architectures.