21.2 A 0.81mA, -105.2dB THD+N Class-D Audio Amplifier with Capacitive Feedforward and PWM-Aliasing Reduction for Wide-Band-Effective Linearity Improvement

In Class-D audio amplifiers (CDAs), nonlinearity of power stages and pulse-width-modulation (PWM) modulators poses a main challenge in pursuit of high-fidelity audio output. The distortion is typically suppressed by a closed-loop topology with high inband loop gain [1, 2]. However, due to the roll-off of the loop gain, the total harmonic distortion plus noise (THD+N) of the CDA tends to increase at high frequency. Another source of distortion arises from the aliasing of high-frequency PWM residuals, which limits the minimum THD+N [3]. Although this can be improved by adopting a higher-order loop filter (LF) or a higher switching frequency (f
SW
), both entail a trade-off between THD+N and quiescent power [3]. All of these raise the need to reduce distortion in an energy-efficient manner over a wider bandwidth of interest. State-of-the-art CDAs alleviated the PWM residuals aliasing by using replicated loop filters [3] or PWM residual-aliasing reduction (PRAR) [4]. The former exhibits low phase shift but higher power consumption while the latter does the opposite. By further combining the PRAR with frequency equalization [5], low THD+N with excellent power efficiency can be achieved. However, frequency equalization is highly dependent on the loop coefficient and requires complex equation solving, impairing the suppression of wide-band distortion.