Unveiling the Advantages of Full Coherency Architecture for FPSoC Systems

The traditional shared memory architectures (MAs) used for CPU-FPGA interaction on FPGA system-on-chip (FPSoC) platforms lack the support for field-programmable gate array (FPGA) caches, resulting in increased FPGA access time to shared system data and CPU-FPGA interference. The full coherency architecture (FCA) enables the implementation of FPGA caches to mitigate these challenges. This brief unveils features of FCA including the basic performance and its influence on CPU-FPGA interference of FPSoCs, revealing that FCA has an up to 70% bandwidth improvement when FPGA cache hits, a 49% bandwidth degradation when FPGA cache misses and 27.9% and 22% improvement on CPU-FPGA interference when CPU accessing CPU caches and DDR, respectively. An automated memory management framework is accordingly proposed to select the optimal MAs based on the analysis of cache hit ratio and execution information, and case studies prove the effectiveness of the framework.