Cache Classification Analysis Supported by Implicit Path Pruning Techniques

Equipping embedded processors with caches can improve the performance of embedded real-time systems, but it also complicates the design and security defense of such systems, as cache hit and miss behaviors require prediction. A feasible method for predicting cache behaviors is cache classification analysis. However, conducting an exact cache classification analysis on a structure-complicated program is NP-complete. So, striving for an acceptable time overhead for an exact cache classification analysis is the research focus. The recent analysis may still report an unacceptable time overhead when analyzing a structure-complicated program. The main reasons are that the sub control flow graph used in the last stage of the recent analysis contains strongly connected components, and that the antichain constructed in the last stage of the recent analysis is not small enough. To eliminate strongly connected components and construct a smaller antichain, we explore the implicit path pruning techniques. With the support of the novel techniques, we redesign the last stage of the recent analysis. When analyzing some structure-complicated programs from different benchmark collections, the worst time overhead of the new last stage does not exceed 35 minutes, while that of the last stage of the recent analysis can reach 5 hours.