0.25V FDSOI CMOS technology for ultra-low voltage applications

A symmetrical threshold voltage design for FDSOI CMOS devices provides a 10/sup 3/ ON-OFF current ratio to realize ultra-low voltage, low power operation. We describe FDSOI CMOS device electrical characteristics along with circuit operation at supply voltages as low as 0.25 V. A figure of merit of 5 fJ/stage is achieved at 0.25 V on 0.25/spl mu/m, 2-input NAND gate FDSOI CMOS ring oscillators. Series resistance and polydepletion effects limit the performance of FDSOI CMOS devices and circuits.