Current-Mode Wideband Frontends With Linearity Enhancement for 5G Receivers

In this article, new receiver frontends have been proposed for direct conversion receivers for 5G communication standard. The receiver consists of a low-noise transconductance amplifier (LNTA), a current-mode passive mixer, and a transimpedance amplifier (TIA). Two different designs have been presented for implementing the LNTA with a particular focus on employing linearization methods. The receiver frontends have been simulated in a $0.18 \mu \mathrm{m}$ CMOS process using ADS. The frontends utilize common-gate LNTAs with the Multiple-Gate Transistors linearization. The first presented frontend achieves 30.1 dB conversion gain, 7.9 dB noise figure (NF), +2 dBm IIP3, and consumes 16.2 mW power. The other receiver frontend makes use of a combined NMOS and PMOS linearization and achieves 23 dB conversion gain, 21.5 dB NF, and +6 dBm IIP3 with the power consumption of 21.42 mW. Both of the frontend implementations use a single 1.8 V supply voltage and the maximum S
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is -9 dB.