A Nanowatt Low Voltage Subthreshold CMOS Voltage Reference Based On 2-T

This article presents the design and implementation of a nanowatt CMOS voltage reference circuit capable of operating with a low supply voltage and functioning over a wide temperature range for Io T and biomedical applications. The core of the proposed voltage reference circuit is based on a two-transistor structure. By utilizing the PMOS leakage current biasing technique, the circuit achieves ultra-low voltage operation. This method does not rely on on-chip resistors or operational amplifiers (opamps), thereby reducing complexity and improving reliability. The design is implemented using 0.18-$\mu$m CMOS technology. The circuit consumes approximately 69 nA from a minimum supply voltage of 0.9 V at room temperature. The untrimmed output voltage is 560 mV, exhibiting an average temperature coefficient (TC) of 43.4 ppm/°C over the temperature range of −40°C to 85°C. The line-voltage sensitivity (LS) is measured 0.303%/V when the input supply voltage varies from 0.9 V to 1.8 V. Finally the DC power supply rejection ratio (PSRR) at 100 Hz is −81.5 dB.