A Low-Power Inductor-Less Linear Wideband CMOS Balun-LNA Using Current Reuse And Linearity Techniques

This brief presents an inductor-less low-power balun-LNA employing negative feedback and post-distortion technique for the purpose of acquiring third-order nonlinearity elimination without disturbing second-order intermodulation cancellation. The common gate (CG)-common source (CS) complementary push-pull topology, partially declines the common gate (CG) transistors thermal noise and the balun technique noise cancellation leads to total noise figure (NF) reduction. The post-distortion technique employs auxiliary cross-coupled transistors in weak-inversion region, which not only improves third-order linearity but also boosts voltage gain. The proposed balun-LNA structure designed in 65nm CMOS technology, reveals a noise figure (NF) of 3.25 dB, a $S_{11}$ of less than −11 dB, and a $S_{21}$ of 16.1 dB covers the −1 dB frequency range of 0.3-5 GHz. It achieves mean second-order intercept point (IIP2) and third-order intercept point (IIP3) of +27 dBm and +5 dBm, respectively. The circuit operates at a nominal supply voltage of 1.2 V with a bias current of 2.48 mA, which leads to low-power consumption.