Design-Space Exploration of the Runge-Kutta Hardware Accelerator for Solving Ordinary Differential Equation

High-performance computing frequently uses ordinary differential equations. But because of their nonlinear character, these equations need some analytic solutions. For these reasons, numerical approaches come into play. In this study, a hardware accelerator for solving an ODE utilizing the Runge-Kutta equations of orders two, three, and four has been implemented. An analysis has been performed on a design-space exploration for the half, single, and double floating-point precision formats. The hardware accelerator intended for the fourth-order Runge-Kutta solver has the most power consumption while operating at a clock frequency of up to 80 Mhzs of the two solvers described in this research, based on the experimental findings. An in-depth evaluation of the power, and utilization of FPGA resources, and a time-consuming summary has also been included in this work.