Exploring the Performance and Power Efficiency of FPGA-Based Tic- Tac-Toe on Spartan3 FPGA Image Processing Kit

FPGAs, also known as field-programmable gate arrays, are being utilised more frequently in a variety of fields, including as artificial intelligence, machine learning, and image processing.This paper describes how Tic Tac Toe was designed and implemented on the Spartan3 FPGA Image Processing package. Verilog HDL was utilised to implement the game, and a VGA monitor and PS/2 keyboard were used for user input and display. Simple logic gates, counters, and finite-state machines were used in the design of the game logic to ensure quick execution time and reduce the number of logic components. The game logic's modular structure makes testing, debugging, and customization simple. The implementation's performance evaluation revealed a high frame rate while using only a small amount of the resources on the Spartan3 FPGA Image Processing kit. The outcomes show how well the Spartan3 FPGA Image Processing package works as a platform for FPGA-based game development also an awareness of the difficulties involved in developing Tic Tac Toe on an FPGA can be created by this paper.