Power-Efficient FPGA Implementation of SVM for Sleep Apnea Detection

Sleep apnea is a common sleep disorder characterized by frequent breathing interruptions during sleep, which can lead to a range of negative health consequences. The diagnosis and treatment of sleep apnea require accurate detection of these breathing events, which can be challenging to detect using traditional polysomnography methods. To address this challenge, various automated sleep apnea detection methods have been developed using machine learning techniques. In this research work, we propose the development of a power-efficient and effective Support Vector Machine (SVM) classifier for the detection of sleep apnea using Field Programmable Gate Array (FPGA) technology, which is known for its high processing speed and low power consumption. The SVM classifier is implemented on the Xilinx Nexys Artix-7 FPGA board. Our experimental results show that our proposed SVM classifier achieves high classification accuracy of 98% for testing data, with a low power consumption of 144 mW. This power consumption is significantly less than that of other SVM classifiers executed on a general-purpose processor.