A 0.013 mm² 3.2-ns Input Range 10-Bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65-nm CMOS

This brief presents a compact gated ring oscillator (GRO) based cyclic time-to-digital converter (TDC) for single-photon emission computed tomography, 3D cameras, and fluorescence lifetime imaging microscopy. With a single GRO serving as both the quantizer and residue generator, the GRO period can serve as the time reference to achieve intrinsic coarse-fine conversion. The proposed cyclic TDC also features a phase domain reset scheme which generates a compensation pulse for purging the GRO phase residue among consecutive conversion cycles. Fabricated in 65nm CMOS, this work occupied an area of 0.013mm2. The proposed TDC achieves a high resolution of 3.1ps together with an extended input range of 3.2ns. Consuming 1.41mW at 36MS/s from a 1-V supply, it also demonstrates a measured DNL and INL of +0.5/-0.6LSB and +3.3/-3.6LSB, respectively.