Toward High-Bit-Rate CMOS-MEMS Resoswitches

This work demonstrates for the first time stable operation of CMOS-MEMS resoswitches with a bit rate over 100 kbps, which presents a significant improvement of ~12.5× compared to that in [1]. Particularly, combining the process-limitation-mitigating techniques demonstrated in CMOS-MEMS and resoswitch technology, namely (1) thermal stress engineering in curved beams for transducer gap narrowing [2], (2) electroless Ni plating for contact engineering [3], and (3) the pre-energizing technique for bit rate enhancement [1], successfully achieves a bit rate over 100 kbps. The curved beam induced gap narrowing technique halves the gap spacing to 300 nm from the nominal 600 nm and thus the bias voltage reduces from the 67 V used in the beam resoswitch of [4] to 35 V. The measurement shows stable and intact switching outputs in contrast to that seen in [4] thanks to Ni modified contact surface. The modulation factor M that determines the strength of pre-energizing level poses a trade-off between the switching time and distinguishability of 1/0 bits. With M = 30% used here, the switching time is reduced to as low as 3.92 μs and finally yields a bit rate up to ~110 kbps.