A 1.28mW K-Band Modified Gilbert-Cell Mixer Design in 22nm FDSOI CMOS

This paper presents a low-power, low-voltage down-conversion mixer fabricated in a 22 nm FDSOI CMOS technology. The proposed mixer design is based on Gilbert-cell architecture and uses a passive transformer instead of an active transconductance stage to overcome voltage headroom limitations in deep-sub-micron CMOS technologies. Measurement results show that the mixer achieves a voltage conversion gain of 7.8 dB, an input-referred 1 dB compression point of −7 dBm, and IIP3 of 4.8 dBm under −8 dBm local oscillator power. The mixer design consumes a low 1.28 mW of power from a single 0.8 V supply voltage, which is a significant improvement compared to the state-of-the-art. Furthermore, the mixer’s compact size of 0.54 $\times$ 0.45 mm
²
, including pads, makes it a highly attractive solution for various applications, as e.g. radar.