A Novel High Q-factor Structure of Digitally Tunable Capacitor for High RF Power Handling Applications

This paper presents a novel high quality-factor (Q-factor) structure of a digitally tunable capacitor (DTC) for high RF power handling applications, such as reconfigurable power amplifiers and reconfigurable antenna circuits. Conventional DTC structures handle high power through series-stacked FETs, which directly degrades the Q-factor. To overcome this structure, a parallel connected structure that effectively uses the stacked-FETs in terms of Q-factor and power handling capability are proposed. All the fabricated circuits were measured at 2 GHz. At an ON-state capacitance of 1.5 pF, the Q-factor was improved by up to 30.9% over a conventional structure. In addition, the OFF-states power handling capability of both conventional and proposed structures achieved an input RF power of 40 dBm. However, the improvement of the proposed structure has capacitance limitations depending on the process. All the conventional and proposed structures were implemented with a $0.13-\mu \mathrm{m}$ partially depleted silicon-on-insulator (PD-SOI) CMOS process and verified.