The CSI Chip-A CMOS charge-successive integrator with a wide dynamic range for the Telescope Array project

A charge-successive integrator (CSI) VLSI with a wide dynamic range has been developed for the front-end electronics of the Telescope Array project. The CSI has more than a 14-bit dynamic range and successively integrates the charge from a photomultiplier tube every 200 ns. We have newly designed an offset-compensated charge integrator to reduce the offset voltage and the 1/f noise. We expect that the offset voltage and the maximum 1/f noise can be reduced to less than 2 mV and 0.2 /spl mu/V/sqrt Hz, respectively, with this technique. The prototype CSI chip was fabricated using a 0.6 /spl mu/m commercially available CMOS technology. The test results of a prototype CSI chip, which has no offset compensation, are compared to the offset-compensated low-1/f noise CSI to confirm the effectiveness of this technique.