Innovative HDL Lessons Targeting the terasIC DE10-Lite Intel FPGA Platform

This work introduces students to hardware description languages and the integration of custom components in terasIC DE10-Lite FPGA boards using Quartus, Platform Designer, and Eclipse. Students learn to set up component connections and settings and make them work using Verilog HDL. Additionally, there’s a session focusing on creating a custom $\mathrm{I}^{2}\mathrm{C}$ component to communicate with an accelerometer using the $\mathrm{I}^{2}\mathrm{C}$ protocol. These hands-on sessions help students gain practical skills in designing and adding custom components to Intel Nios FPGA systems. These skills create a strong foundation for modernizing coursework in hardware description languages by teaching practical Verilog description for components and their integration into systems. In summary, this work helps students bridge the gap between theory and real-world implementations. As the digital world evolves quickly, these skilled engineers are well-prepared to lead innovation, influence industries, and contribute to the future of technology.