Controller Hardware-In-the-Loop Validation of Phasor-Domain Algorithms for High-Speed Protection of Power Networks

Controller hardware-in-the-loop (CHIL) validation is a valuable technique that helps engineers develop, validate, and optimize control algorithms and controllers cost-effectively, efficiently, and safely. It plays a crucial role in developing and deploying advanced engineering systems across various industries. In this paper, the researchers have confirmed the effectiveness of four phasor domain algorithms for rapidly securing power networks on control hardware setups. This is accomplished by employing the TMS320F28335 prototype in a hardware-in-the-loop configuration. The performance of these algorithms is evaluated on a real-time digital simulator (RTDS), using a simulated 9-bus system.