Electrical Characteristic analysis of Gate Underlap Strain Channel Cylindrical GAA FET

In this study, a gate underlap strained channel Cylindrical Gate All Around FET with an 8nm gate length was proposed and analyzed to provide faster switching with a lower subthreshold swing. It was accomplished by raising on-current by the use of a Type-II hetero-band structure, which improves increased carrier density and strained engineering on the channel, improving carrier flow via quasi-ballistic movement, and carrier density. The proposed device is made up of a cylinder-shaped outer s-Si layer that surrounds and creates a quantum well with the center s-SiGe layer and gate underlap area. This boosts the switching speed of the device while decreasing leakage current and attaining a reduced subthreshold swing.