An Efficient and Secure Inline Assembly Design for VLIW DSP

To improve the development efficiency and security of digital signal processing (DSP), it is crucial to incorporate mixed programming features into embedded systems. The integration of inline assembly offers lower-level control over hardware resources and enables the potential for error analysis at the assembly level. This study specifically focuses on SWIFT DSP and leverages its unique instruction architecture to propose an innovative inline assembly solution based on the LLVM compiler framework. This study also explores the implementation of Very Long Instruction Word (VLIW) packing and delay slot insertion in inline assembly. Support for VLIW packing enhances code concurrency, while delay slot insertion mitigates potential issues in inline assembly, ensuring the safety of related code. The proposed solution seamlessly integrates with the traditional C compiler and performs effectively across diverse slot versions of SWIFT DSP. Our evaluation results clearly show that our approach successfully strikes a balance between high performance and efficient development, while also ensuring security.