FPGA-based DBSCAN Clustering Nonlinear Equalizer Accelerator for MMW Radio-over-Fiber System

Clustering algorithms have been widely applied in wireless/optical communication systems for nonlinear equalizations. However, for high-speed communication systems with enormous data volumes, the excessive computational time for clustering large numbers of data points greatly impede their practical applications. This work focuses on the acceleration of the state-of-art density-based spatial clustering of applications with noise (DBSCAN) algorithm using the field-programmable gate array (FPGA) platform. To this end, a novel parallel DBSCAN algorithm as well as its FPGA hardware architecture are proposed here. Also, its applications in a 60-GHz millimeter-wave radio over fiber (MMW-RoF) communication system for nonlinear equalizations are experimentally investigated. Validated by experiments, our DBSCAN accelerator can effectively improve the nonlinearity tolerance of the 60-GHz MMW-RoF system transmitting the single-carrier 64-QAM signal. More importantly, harnessing the Xilinx Ultrascale+ ZCU111 board, our proposal can achieve up to 7.2x speedup over the software implementation of the traditional sequential-DBSCAN (S-DBSCAN) on the AMD Ryzen7 5800H CPU, and 19.2x speedup than the FPGA implementation of the S-DBSCAN algorithm.