Explore the Feedback Interconnects in Intra-Cluster Routing for FPGAs

Routing architecture has a significant effect on the performance and area of FPGA. In academia, the global routing architecture is mainly based on the connection blocks (CBs) and switch blocks (SBs). There are input crossbars inside the logic blocks (LBs) which are used to connect the LB pins and feedbacks to the LUT inputs. Muxes in the crossbar are used to implement the intra-cluster connections. In the previous researches, there are few papers focusing on the exploration of feedback interconnects. Besides, it is hard to model the complex feedback interconnects in commercial FPGAs as the feedbacks can only connect to the muxes in the crossbar in the CB-SB architecture. In this paper, we enhance VPR to support GRB (general routing block) architecture which replaces the CBs, SBs and input crossbars to alleviate this problem and explore complex feedback interconnects. Four parameters are proposed to describe the feedback interconnects architecture. Compared to the CB-SB like feedback interconnects architecture, experimental results show that the proposed architecture can achieve 4.5% improvement on the routing area, 2.1% improvement on the critical path delay and 6.5% improvement on the area-delay product with VTR benchmarks.