First Demonstration of Defect Elimination for Cryogenic Ge FinFET CMOS Inverter Showing Steep Subthreshold Slope by Using Ge-on-Insulator Structure

This work presents experimental electrical characteristics and circuit prediction at cryogenic temperatures (down to 10 K) for three different kinds of germanium (Ge)-based FETs with advanced Fin/GAA structures. Among them, the layer transferred Ge-on-Insulator (GeOI) FinFET significantly improves its I-V characteristic during cryogenic measurements, such as a steeper subthreshold swing at 10K and a better I
on
. The developed GeOI fabrication method provides an effective way to eliminate the defects originating from misfit dislocations at the Ge/Si substrate during epitaxial growth, which would be treated as the key to device performance enhancement under 10 K. According to the measured IV at 10 K and circuit prediction, GeOI FinFETs with high Ge crystallinity are strong candidates for High-Performance-Computing (HPC) applications.