Unveiling the Impact of High Frequency On-State and Off-State Operation on Gate Dielectric Reliability: A Comprehensive Analysis

In this work, on-state (gate) bias and off-state (drain) bias time-dependent dielectric breakdown (TDDB) are studied across DC to AC to mimic real circuit operation. For the first time, investigation of lifetime difference between AC square to sinusoidal waveform is reported, which paves the way to understand TDDB performance towards GHz application. Through a variety of frequency and duty ratio (DR) combinations, extended AC lifetime gain at high frequency operation is demonstrated. In addition, higher AC gain for off-state bias than on-state bias is also shown in this work. Accordingly, an oxygen vacancy-based simulation model is developed to describe dynamic defect evolution upon stress time, in which trap recombination is proven to be one of the key factors for AC TDDB gain in both on-state and off-state bias conditions. This leads to a deceleration in percolation path formation in interfacial layer (IL), resulting in trap generation suppression in HK and thus an improvement in TDDB. The extended AC TDDB at GHz in this work underscores the significance of application-based reliability methodology in the context of scaled transistors and the development of More-than-Moore products.