Efficient Implementation of Boolean Logic Functions Using Double Gate Charge-Trapping Memory for In-Memory Computing

In this work, we have utilized a vertical double gate (DG) charge-trapping memory (CTM) to implement Boolean logic functions for in-memory computing (IMC). IMC architecture is an efficient and revolutionary computing paradigm that can overcome the limitations of von Neumann’s computing. The independent gate operation of the device successfully implements the in-memory logic functions such as AND, OR, NAND, and NOR in two steps, namely, program and read operations. Moreover, the proposed method with a DG efficiently implements the XOR and XNOR operations. Furthermore, the device is simulated with high-
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material (Al2O3) as blocking oxide to reduce the time and voltage for low energy consumption. The DG-CTM consumes ~22.5 fJ to implement the AND Boolean logic function. The two-step reliable and low power consumption process Fowler–Nordheim (FN tunneling) makes the device promising for next-generation IMC systems.