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Pipestitch: An energy-minimal dataflow architecture with lightweight threads | IEEE Conference Publication | IEEE Xplore

Pipestitch: An energy-minimal dataflow architecture with lightweight threads


Abstract:

Computing at the extreme edge allows systems with high-resolution sensors to be pushed well outside the reach of traditional communication and power delivery, requiring h...Show More

Abstract:

Computing at the extreme edge allows systems with high-resolution sensors to be pushed well outside the reach of traditional communication and power delivery, requiring high-performance, high-energy-efficiency architectures to run complex ML, DSP, image processing, etc. Recent work has demonstrated the suitability of CGRAs for energy-minimal computation, but has focused strictly on energy optimization, neglecting performance. Pipestitch is an energy-minimal CGRA architecture that adds lightweight hardware threads to ordered dataflow, exploiting abundant, untapped parallelism in the complex workloads needed to meet the demands of emerging sensing applications. Pipestitch introduces a programming model, control-flow operator, and synchronization network to allow lightweight hardware threads to pipeline on the CGRA fabric. Across 5 important sparse workloads, Pipestitch achieves a 3.49× increase in performance over RipTide, the state-of-the-art, at a cost of a 1.10× increase in area and a 1.05× increase in energy.CCS CONCEPTS• Computer systems organization → Data flow architectures.
Date of Conference: 28 October 2023 - 01 November 2023
Date Added to IEEE Xplore: 06 February 2024
Print on Demand(PoD) ISBN:979-8-3503-3056-4
Conference Location: Toronto, ON, Canada

Funding Agency:


References

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