Design of a Low-Noise Amplifier for Ultra Low Power Wake-Up Receiver in 868 MHz

This paper presents the design of a Low Noise Amplifier (LNA) for a duty-cycled wake-up receiver operating at 868 MHz frequency band. The LNA is designed using a hetero-junction bipolar transistor. The operating point was selected to realize a trade-off between power consumption, gain, and noise figure with the aim to enhance the wake-up receiver’s sensitivity while maintaining very low power consumption. The transistor was stabilized using the collector feedback biasing technique and matched with lumped components to 50 Ohm impedance. The overall LNA design is a single-stage 19 dB gain consuming only 2 mW from a 1V DC power supply. The simulation results show an input return loss of -12 dB at 868 MHz with a low noise figure of 0.53 dB. The obtained results could be made tunable by working with off-the-shelf components for different wake-up-based application requirements.