Spike-Driven Synaptic Plasticity for a Memristive Neuromorphic Core

To create hardware platforms that are compact, power-efficient, and suitable for online learning, we develop a spike-driven synaptic plasticity (SDSP) circuit for a Hafnium-Oxide-based memristive neuromorphic core. The core includes a configurable integrate-and-fire (IAF) neuron and a current-controlled memristive synapse, with SDSP modifying synaptic weights based on pre-synaptic spikes, the post-synaptic neuron's membrane potential, and recent spiking activity. Compared to the widely used spike-timing-dependent plasticity (STDP), the SDSP model can overcome its limitations and potentially be implemented in a smaller area. Simulations using a 65nm CMOS process confirm the circuit's functionality and find that it offers reliable weight switching and good performance in terms of area and power consumption.