Ultra-low $I_{Q}$ Fully Integrated NMOS LDO with Enhanced Load Regulation and Startup for RF Energy Harvesting Sensors

NMOS low-dropout (LDO) voltage regulator architecture with an ultra-low quiescent current is proposed for integration in radio-frequency (RF) energy harvesting sensors. The transient enhanced inverter (TEI) is added to conventional architecture to improve the load transient response. TEI reduces the output voltage undershoot/overshoot to 83.30 % and settling time to 28.65 % to achieve 1 % percision compared to the conventional LDO architecture. The start-up assistant RC (SARC) improves the settling time by 1.22 ms for the step input voltage to LDO. The NMOS LDO regulator with 14.76 nA quiescent current is simulated in the 180 nm CMOS technology. The line and load regulations are respectively 0.012 mV/V and 60 mV/mA with 1 pF load capacitor and maximum 1 μA load current. The PSRR is -60 dB at the low frequencies and -7.3 dB at 1 MHz.