Ultra-Small Area, Highly Linear Sub-Radix R-2R Digital-To-Analog Converters with Novel Calibration Algorithm

This paper presents on the design of ultra-small area R-2R digital-to-analog converters (DACs). We propose a technique of using redundancy and topological modifications to make MSB DAC sub-radix. The redundancy scheme utilized affords us the ability to implement highly linear DACs with relaxed matching requirements (N-5 bits or lower). Furthermore, this paper also presents a memory efficient novel digital calibration algorithm. We validate our proposed circuits using simulation results of two novel DAC architectures designed in TSMC 180nm showing different ways of implementing redundancy. Post calibration results show that both designs achieve a 14-bit level integral nonlinearity and differential non-linearity (INL/DNL) better than ±0.5LSBs and ±1LSBs respectively even though they were designed using 7-bit linear performance matching requirement.