A Hybrid Cascaded Multilevel Converter Based on Si and SiC Devices and Its Regulation Optimization Strategy

The traditional cascaded multilevel converter has the problems of many submodules, low power density and high loss. Therefore, this paper proposes a hybrid cascaded multilevel converter (HCMC) topology based on Si and SiC devices. The HCMC consists of a cascaded H-bridge (CHB) unit mixed with Si IGBT and SiC MOSFET devices in series with a three-level neutral point clamped (NPC) unit of all-Si IGBT devices. Then, a special high- and low-frequency hybrid modulation strategy is presented for this topology, which gives full play to the advantages of low conduction loss of Si IGBT and low switching loss of SiC MOSFET. Further, the parameter optimization design of the HCMC is given. In addition, an alternation voltage balancing control method is presented to avoid the problem of capacitor voltage imbalance in submodules. Finally, the simulation and experiment are conducted under the reactive power compensation condition of the 6 kV system, and the effectiveness of the proposed topology and modulation strategy is proved. Moreover, the loss comparison between HCMC and existing cascaded multilevel converters proves that the proposed HCMC topology greatly reduces the operating loss while ensuring the output performance.