Analysis of VCO-Based Continuous-Time ΣΔ ADCs Using a Subset of Phases as the Feedback Signal

High speed Continuous-Time
$\Sigma \Delta $
Analog-to-Digital converters (ADC) have a limited sampling frequency that bounds their performance with a low resolution Flash ADC. This brief explores the performance of using a high resolution VCO-based ADC as the internal quantizer. Counting the edges produced by the VCO and feeding them back in the loop imposes a design challenge in terms of latency and silicon area. This can be circumvented by including in the loop a subset of VCO phases, and by increasing the resolution by means of digital filtering, as in a Leslie-Singh architecture. Using a small subset of VCO phases produces modulation side bands at mid frequencies, especially in high speed applications. By proper digital filtering, modulation side bands are pushed up to high frequencies as if all the VCO phases were used in the loop. This is investigated and proved. A simulation example is also given to show that simple filtering can be enough to attenuate those modulation side bands in practical applications.