Design and Investigation of the Fault Tolerant FPGA Layout

The design of highly reliable field-programmable gate array (FPGA) is one of the most critical tasks of modern integrated technology. This type of FPGA is necessary for critical digital equipment. The proposed method of providing an appropriate level of reliability is based on the insertion of redundancy at the transistor level. The article considers variants of FPGA cells using transistor redundancy and normal FPGA cells. This will allow us to assess the impact of the full implementation of redundancy in the FPGA.