Design of Efficient Quantum-Dot Cellular Automata Multiplier

QCA, the appealing nature of this thrilling new technology makes it a compelling alternative to CMOS technology as it enables the design of digital circuitry that is highly dense, power-efficient, and capable of exceptional performance. It’s based on polarisation of cell and the transfer of information to adjacent cells is accomplished using Coulomb interaction. Nevertheless, there are a number of difficulties in designing digital circuits for QCA, and it would be ideal to use innovative implementation techniques. This project suggests a novel design strategy focused on the development and application of a serial parallel repeater in a QCA. By utilising the systolic method, the proposed Multiplier provides an improved area. The Multiplier suggested here has considerably higher speed and a smaller overall footprint than its existing counterparts.