A Low-power Digital Automatic Gain Control Design in Wireless Communication Receivers

To address the issue of highly variable input signals in wireless receivers, we propose a low-power automatic gain control (AGC) algorithm. In comparison to traditional AGC methods, this algorithm offers several advantages, including high flexibility, precision, dynamic range, and adjustment speed. By utilizing comparators and look-up tables instead of multiplication operations, the algorithm significantly reduces circuit area and power consumption. The simulation results demonstrate that the AGC can achieve its first gain adjustment within just 6μs after receiving the signal. This indicates an exceptionally fast response time for the AGC algorithm. The AGC can be configured to accommodate a wide dynamic range or high resolution based on specific requirements. We implement the algorithm using a 28nm CMOS process at the register transfer level (RTL). In this study, we present an AGC circuit with an area consumption of 0.002mm
²
and a power consumption of 28.9 μW.