Enhancing Stochastic Computing using a Novel Hybrid Random Number Generator Integrating LFSR and Halton Sequence

This paper presents a new approach to address the increased hardware complexity and power demands associated with using multiple random number generator (RNG) in stochastic computing (SC). We propose a novel hybrid RNG, which combines a linear feedback shift register (LFSR) and a Halton sequence generator, to facilitate efficient generation of random number sequences in SC. Implemented in a $65- nm$ CMOS technology, our hybrid RNG yields up to 18% and 30% enhancements in area and power, respectively, compared to the traditional LFSR-based equivalent. Further, the proposed RNG’s efficacy is demonstrated through its incorporation in SC-based Robert cross-edge detector algorithm, yielding reductions in area and power by 28% and 35%, respectively, while preserving superior processing quality.